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DATA SHEET
MOS INTEGRATED CIRCUIT
PD168117
7-CHANNEL H-BRIDGE DRIVER WITH A MICRO STEP FUNCTION SUPPORTING PULSE INPUT
DESCRIPTION
The PD168117 is a 7-channel H-bridge driver with a micro step function supporting pulse input that consists of a CMOS control circuit and a MOS output stage. It can reduce the current consumption and the voltage loss at the output stage compared with a conventional driver using bipolar transistors, thanks to employment of a MOS process. Moreover, at the PD168117, micro step control of 128 divisions can perform stepping motor drive by the pulse input, and motor can be driven by low noise and low vibration. The package is a 56-pin WQFN that helps reduce the mounting area and height. The PD168117 can be used to drive two stepping motors, or two DC motors and one coil.
FEATURES
* Seven H-bridge circuits employing power MOS FET * Low-voltage driving VDD = 2.7 to 3.6 V VM = 2.7 to 5.5 V * Output on-state resistance: 1.0 TYP., 1.5 MAX. (sum of top and bottom stage, ch1 to ch4, and ch7) 1.5 TYP., 2.0 MAX. (sum of top and bottom stage, ch5 and ch6) * PWM output (ch1 to ch6), linear output (ch7) * Output current DC current: 0.4 A/ch (when each channel is used independently) Peak current: 0.7 A/ch (when each channel is used independently) DC current: 0.5 A/ch (when used independently) Peak current: 0.7 A/ch (when used independently) * Input logic frequency: 150 kHz supported * Under-voltage lockout circuit Shuts down the internal circuit at VDD = 1.7 V TYP. * Overheat protection circuit Operates at 150C or more and shuts down internal circuitry. * 56-pin WQFN (8 mm, 0.5 mm pitch)
ORDERING INFORMATION
Part Number Package
Note
PD168117K9-9B4-A
56-pin plastic WQFN (8 x 8)
Note Pb-free (This product does not contain Pb in external electrode and other parts.)
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
Document No. S17310EJ2V0DS00 (2nd edition) Date Published December 2004 NS CP(K) Printed in Japan
The mark
shows major revised points.
2004
PD168117
1. PIN CONFIGURATION
Package: 56-pin plastic WQFN (8 x 8)
3 to 5 V
M
22 F
42
41
40
39
38
37
36
35
34
33
32
31
30
29
VREF7
VM34
PGND34
OUT3B
OUT3A
OUT4B
VM34
SELVREF7
OUT4A
IN7B
SEL7
FIL4
FIL3
43 IN7A 10 k 150 pF 44 FIL7 45 R7 10 k 46 FB7 1 47 OUT7A 48 VM7 22 F 3 to 5 V 10 F 3 V 49 OUT7B 50 VDD 51 LGND 100 pF at 300 kHz PWM 52 COSC 53 OE1 54 CLK1 55 CW1
FIL2
1000 pF x 4
FIL1 28 FB4 27 FB3 26 FB2 25 FB1 24 OUT1B 23 VM12 22 OUT1A 21 PGND12 20 OUT2B 19 VM12 18 OUT2A 17 IN5A 16 3 to 5 V 22 F 5 k x 4
M
CLK2/IN3B
CW2/IN4A
56 OE2/IN3A
MODE4/IN4B
IN5B 15
PGND56
MODE3
MODE2
MODE1
OUT6B
OUT6A
OUT5A
OUT5B
VM56
IN6B
13
1
2
3
4
5
6
7
8
9
10
11
12
14
M
3 to 5 V
M
22 F
2
Data Sheet S17310EJ2V0DS
IN6A
PD168117
2. PIN FUNCTIONS
(1/2)
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Pin Name CLK2/IN3B CW2/IN4A OUT6B OUT6A PGND56 OUT5A VM56 OUT5B MODE4/IN4B MODE3 MODE2 MODE1 IN6B IN6A IN5B IN5A OUT2A VM12 OUT2B PGND12 OUT1A VM12 OUT1B FB1 FB2 FB3 FB4 FIL1 FIL2 FIL3 FIL4 OUT4A VM34 OUT4B PGND34 OUT3A VM34 OUT3B Function H-bridge 3, H-bridge 4 CLK input pin/H-bridge 3 input pin B H-bridge 3, H-bridge 4 driving direction input pin/H-bridge 4 input pin A H-bridge 6 output pin B H-bridge 6 output pin A H-bridge 5, H-bridge 6 GND pin H-bridge 5 output pin A H-bridge 5, H-bridge 6 power supply pin H-bridge 5 output pin B Mode selection pin 4/H-bridge 4 input pin B Mode selection pin 3 Mode selection pin 2 Mode selection pin 1 H-bridge 6 input pin B H-bridge 6 input pin A H-bridge 5 input pin B H-bridge 5 input pin A H-bridge 2 output pin A H-bridge 1, H-bridge 2 power supply pin H-bridge 2 output pin B H-bridge 1, H-bridge 2 GND pin H-bridge 1 output pin A H-bridge 1, H-bridge 2 power supply pin H-bridge 1 output pin B Current detection resistor connection pin 1 Current detection resistor connection pin 2 Current detection resistor connection pin 3 Current detection resistor connection pin 4 Filter capacitor connection pin 1 Filter capacitor connection pin 2 Filter capacitor connection pin 3 Filter capacitor connection pin 4 H-bridge 4 output pin A H-bridge 3, H-bridge 4 power supply pin H-bridge 4 output pin B H-bridge 3, H-bridge 4 GND pin H-bridge 3 output pin A H-bridge 3, H-bridge 4 power supply pin H-bridge 3 output pin B
Data Sheet S17310EJ2V0DS
3
PD168117
(2/2)
Pin No. 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 Pin Name VREF7 SELVREF7 SEL7 IN7B IN7A FIL7 R7 FB7 OUT7A VM7 OUT7B VDD LGND COSC OE1 CLK1 CW1 OE2/IN3A ch7 reference voltage external input pin ch7 reference voltage setup selection pin ch7 excitation mode selection pin H-bridge 7 input pin B H-bridge 7 input pin A Amplifier operation stabilizing filter connection pin Amplifier operation stabilizing resistor connection pin Current detection resistor connection pin 7 H-bridge 7 output pin A H-bridge 7 power supply pin H-bridge 7 output pin B Logic block power supply pin Logic block GND pin Chopping frequency setting capacitor connection pin H-bridge 1, H-bridge 2 output enable pin H-bridge 1, H-bridge 2 CLK input pin H-bridge 1, H-bridge 2 driving direction input pin H-bridge 3, H-bridge 4 output enable pin/H-bridge 3 input pin A Function
4
Data Sheet S17310EJ2V0DS
PD168117
3. BLOCK DIAGRAM
LGND VDD OE1 CLK1 CW1 MODE1 MODE3 MODE2 OE2/ CLK2/ CW2/ MODE4/ IN3A IN3B IN4A IN4B
FB1 FB2 VM12 OUT1A OUT1B PGND12 FIL1
Current Sense 1 Current Sense 2 Current Sense 4 ch1 H-bridge ch1/ch2 Control ch3/ch4 Control ch3 H-bridge
OSC Current Sense 3
COSC
FB3 FB4 VM34 OUT3A OUT3B PGND34
OUT2A OUT2B FIL2 VM56 PGND56 OUT5A OUT5B
Control and Pre-driver ch2 H-bridge TSD
UVLO
FIL3
ch4 H-bridge
OUT4A OUT4B FIL4 IN7A
200 mV VREF7 ch5 H-bridge ch6 H-bridge
IN7B VM7 ch7 H-bridge
IN5A IN5B
IN6A IN6B OUT6A OUT6B SELVREF7 R7 FIL7 FB7 OUT7A VREF7 SEL7
OUT7B
Data Sheet S17310EJ2V0DS
5
PD168117
4. STANDARD CONNECTION EXAMPLE
8 CPU
10 F
3V
VDD LGND
OE1 CLK1 CW1 MODE1
MODE2 MODE3
OE2/ CLK2/ CW2/ MODE4/ IN3A IN3B IN4A IN4B
FB1 FB2 5 k x 2 VM12 OUT1A OUT1B 1000 pF PGND12 FIL1
Current Sense 1 Current Sense 2 Current Sense 4 ch1 H-bridge ch1/ch2 Control ch3/ch4 Control ch3 H-bridge
OSC Current Sense 3
COSC 100 pF FB3 FB4 VM34 OUT3A OUT3B PGND34 5 k
M
OUT2A OUT2B 1000 pF FIL2 VM56 PGND56
Control and Pre-driver ch2 H-bridge TSD
UVLO
FIL3 1000 pF ch4 H-bridge OUT4A OUT4B FIL4 IN7A
M
1000 pF
200 mV VREF7 ch5 H-bridge ch6 H-bridge
M
OUT5A OUT5B
IN7B 3 to 5 V VM7 ch7 H-bridge 22 F
IN5A IN5B
SELVREF7 IN6A IN6B OUT6A OUT6B VREF7 SEL7 R7 FIL7 FB7 OUT7A
10 k
OUT7B
M
10 k 150 pF
1
ex. 150 mV
Cautions 1. Be sure to connect all of the pins which have more than one. 2. The constants shown in the above diagram are provided as examples only. Perform design based on thorough evaluation with the actual machine.
6
Data Sheet S17310EJ2V0DS
PD168117
5. FUNCTION OPERATION TABLE
5.1 Power Save Function
This IC can be placed in the power-save mode by making MODE1, MODE2, MODE3, and MODE4 high level. This function allows holding of the excitation position when the stepping motor mode is selected and the operation to be started from where the excitation position is held when the power-save mode is cleared. In the power-save mode, the current consumption is reduced to 20 A TYP. because the internal circuits other than UVLO are stopped. The operation modes of ch1 to ch4 can be set by a combination of MODE1 to MODE4. For the combination of the MODE pins, refer to Table 5-1. MODE Pin Truth Table.
Table 5-1. Mode Pin Truth Table
MODE1
MODE2
MODE3
MODE4 (/IN4B) ch1, ch2 2-phase excitation 1-2 phase excitation Micro step L H L 2-phase excitation 1-2 phase excitation
Operation Mode ch3, ch4 General-purpose driving (current limiting)
L L L L L H
L L H H H L
L H L H H L
IN4B input
2-phase excitation 1-2 phase excitation 2-phase excitation (current limiting) 1-2 phase excitation (current limiting) Micro step Micro step 2-phase excitation 1-2 phase excitation Micro step
2-phase excitation (current limiting)
H
L
L
H
1-2 phase excitation (current limiting)
H H H H H H
L L H H H H
H H L L H H
L H L H L H
2-phase excitation 1-2 phase excitation Micro step Micro step Micro step Power save mode
Remark H: High level, L: Low level
Data Sheet S17310EJ2V0DS
7
PD168117
5.2 ch1, ch2 (Dedicated to Stepping Motor)
CLK1
CW1 L L H H
OE1 H H H H L
Operation Mode Pulse progress, CW mode Pulse progress, CW mode Pulse progress, CCW mode Pulse progress, CCW mode Output Hi-Z (The internal follows the above-mentioned mode of operation)
x
x
Remark x: High level or low level, Hi-Z: High impedance 5.3 ch3, ch4 (Selecting Stepping Motor, DC Motor and Coil Driving)
CLK2 CW2 L L H H x x OE2 H H H H L Operation Mode Pulse progress, CW mode Pulse progress, CW mode Pulse progress, CCW mode Pulse progress, CCW mode Output Hi-Z (The internal follows the above-mentioned mode of operation)

IN3A/IN4A L L H H IN3B/IN4B L H L H H OUT3A/OUT4A Z L
Note
OUT3B/OUT4B Z H
Note
Operation Mode Stop Reverse Forward Brake
L H
H
Note When the PD168117 is used for constant-current driving (when a sense resistor is connected to the FB pin), chopping driving is performed. Remark Z: Output high impedance
8
Data Sheet S17310EJ2V0DS
PD168117
5.4 ch5, ch6
IN5A/IN6A L L H H
IN5B/IN6B L H L H
OUT5A/OUT6A Z L H H
OUT5B/OUT6B Z H L H Stop Reverse Forward Brake
Operation Mode
Forward
VM
Reverse
VM
ON
OFF
OFF
ON
LOAD A B A
LOAD B
OFF
ON
ON
OFF
GND
GND
Stop
VM
Brake
VM
OFF
OFF
ON
ON
LOAD A B A
LOAD B
OFF
OFF
OFF
OFF
GND
GND
Data Sheet S17310EJ2V0DS
9
PD168117
5.5 ch7
IN7A
IN7B
OUT7A
OUT7B Q1
H-bridge Output State Q2 OFF ON Q3 OFF ON (linear) Q4 OFF OFF
L L
L H
Z L (linear)
Z H
OFF OFF
H
L
H
L (linear)
ON
OFF
OFF
ON (linear)
H
H
H
H
ON
ON
OFF
OFF
VM7
Q1
Q2
OUT7A - + Q3
OUT7B - + Q4
5.6 SEL7 Pin
The current that flows into ch7 can be changed by setting the SEL7 pin.
SEL7 L H
Operation Mode Weak excitation mode (Current 2/3 of the normal setting flows.) Normal operation mode (Comparison operation with reference voltage)
10
Data Sheet S17310EJ2V0DS
PD168117
5.7 Reference Voltage Settings
The external setting mode, in which the reference voltage is input to VREF7 externally, and the internal setting mode, in which the internal reference voltage is used, can be switched using the SELVREF7 pin. When using the external setting mode, the voltage which will become reference voltage must be applied to the VREF7 pin. The functions for the SEL7 pin will be enabled, regardless of the external/internal setting mode. The voltage (when external setting mode is set), and the 200 mV (when the internal setting mode is set) that are applied to the VREF7 pin are equivalent to normal operation mode (SEL7 = H).
SELVREF7 L H
Operation Mode External setting mode (Voltage must be applied to VREF7) Internal setting mode (200 mV setting)
6. COMMAND INPUT TIMING CHART
Figure 6-1. In The Micro Step Mode
Internal reset signal (Reset = L)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1617 18 19 20 21 22 23 24
CLK
CW
OE
1
2
3
4
5
6 7 8 9 10
11
12 13 14 15 14 13 12 11 10 9 8 7 6
Pulse output
Chopping pulse
CW mode
Output Hi-Z
CW mode
CCW mode
Output Hi-Z
Reset state
Reset state
Remark The motor excitation output is equivalent to the pulse output. The excitation position of the motor is changed by the rising edge timing of the pulse output (equals the rising or falling edges of CLK).
Data Sheet S17310EJ2V0DS
11
PD168117
7. FUNCTIONAL DEPLOYMENT
7.1 Reset Function
This whole IC can be changed into a reset state by setting all of MODE1 to MODE4 to H, and all of IN5A, IN5B, IN6A, IN6B, IN7A, and IN7B to L. In the state of reset, an output will be in Hi-Z state, and since it stops operation of an internal circuit, it can make self-consumption current below 1 A. Be sure to perform a reset operation. In the reset operation, the internal circuitry is stopped whenever possible, so that the self current consumption can be reduced. When the external input signal is stopped, the current consumption can be lowered to 1 A MAX. Immediately after release of reset, excitation is started from the position where the current of ch1 is 100% and the current of ch2 is 0%, in the micro step drive mode and 1-2 phase excitation drive mode. In the 2-phase excitation drive mode, excitation is started from the position where the currents of ch1 and ch2 are 100%.
7.2 2-phase Excitation Drive Mode and 1-2 Phase Excitation Drive Mode
In the 2-phase excitation drive mode, current of 100% is allowed to flow into ch1 and ch2 simultaneously. In the 12 phase excitation drive mode, the motor can be driven at a higher torque by allowing a current to flow so that the synthesized torque of ch1 and ch2 is the same as the torque at phase 1 position. The 2-phase excitation, 1-2 phase excitation, and micro step driving modes are selected by the MODE1 to MODE4 pins.
Note that 100% (= saturation drive mode) and a mode in which the current set by the sense resistor is used can be selected by the MODE pin. Current control is performed by chopping drive.
7.3 Micro Step Drive Mode of Stepping Motor
The current flowing into the H-bridge is constant by using a vector value so that one period can be stopped in 1/128 steps. This function is provided to realize high-accuracy positioning control of a stepping motor. To realize this micro step driving, the following functions are internally realized by the driver.
* Detection of current flowing into each channel by sense resistor as voltage value * Synthesizing half the dummy sine waveform generated by the internal D/A with PWM oscillation waveform for chopping operation * Driver stage performing PWM drive based on result of comparing detected voltage and synthesized waveform
Because the internal dummy sine wave consists of 128 steps per period, it can be used to drive a stepping motor using 128 divisions. The micro step drive mode, 2-phase excitation drive mode, and 1-2 phase excitation drive mode can be selected by using external pins.
12
Data Sheet S17310EJ2V0DS
PD168117
Figure 7-1. Concept of Micro Step Drive Operation
+
M
A
7.4 Input Signals (CLK, OE and CW pins, stepping motor control methods)
The motor is driven by the pulses input to the CLK1 (CLK2) pin. The pulses advance by one at the rising and falling edges of the CLK1 (CLK2) signal. When the CLK1 (CLK2) pin is fixed to low levels, the internal excitation positions do not progress, regardless of the input status of the OE1 (OE2) pin. Since 1 electrical angle cycle is divided by 128, it equals 1 electrical angle cycle because of the 64-clock input. Since both edges are used for control, the pulse intervals that are output rely on the pulse duty which is input. It is suggested that pulses with a duty of 50% should be input.
The rotational direction of the motor is set by CW1 (CW2). In CW mode, the current for ch2 (ch4) is output delayed by a 90 phase in relation to the current for ch1 (ch3). In CCW mode, the current for ch2 (ch4) is output advanced by a 90 phase in relation to the current for ch1 (ch3).
7.5 Output Enable (OE) Pin
The OE1 (OE2) pin can be used to forcibly stop pulse output of ch1 and ch2 (or ch3 and ch4). When OE1 (OE2) = L, the output is forcibly made to go into Hi-Z. Moreover, since an internal excitation position can make it go on also at OE1 (OE2) pin = L, an internal excitation position advances in inputting a pulse into CLK1 (CLK2) pin. The internal information will be held if OE1 (OE2) = L and CLK1 (CLK2) pin are fixed to low level. Motor position information is memorized unless it is reset. In performing stepping motor control, be sure to give as OE1 (OE2) = H.
Data Sheet S17310EJ2V0DS
13
PD168117
7.6 Current Detection Resistor Connection (FB) Pin
(1) ch1 to ch4 The current detection resistor is connected when current driving is necessary. It is used for micro step driving and solenoid driving. The peak value (at 100% current of ch1 (ch3) or ch2 (ch4)) of output current is decided by the
resistance RFB linked to FB1 (FB3) and FB2 (FB4). This IC contains the reference power supply VREF for current value comparison (500 mV TYP.) in the internal, and performs the drive which makes the current value acquired from RFB and VREF an output current peak value.
The current that flows into the output is {500 mV (reference voltage) /FB pin resistance x 1050}. Peak output current: IMAX (A) VREF (V) / RFB () x 1050
Example)
Where FB = 4.7 k Output current = 500 (mV) /4.7 (k) x 1050 111.7 (mA) This means constant current driving of about 111.7 mA.
When current driving is not performed, connect the FB pin to GND.
(2) ch7 Connect the current detection circuit between the source of the driver low side and GND. Because the circuit is configured to detect current directly, connect a detection resistor of low resistance (1 maximum).
The current that flows into the output is {200 mV (reference voltage) /FB7 pin resistance} (when SEL7 = H). Output current: IMAX (A) VREF (V) / RFB () Where FB7 = 0.5 Output current = 200 (mV) /0.5 () = 400 (mA) This means constant current driving of 400 mA.
Example)
Because only ch7 employs the linear drive mode and directly detects the output current, the current accuracy is determined only by the external resistor and the offset of the current control amplifier. The above example shows (SELVREF7 = H) using the internal reference voltage. When applying reference voltage externally, set SELVREF7 to L, then apply voltage to the VREF7 pin. The output current can be calculated by transposing 200 mV in the computational expression.
14
Data Sheet S17310EJ2V0DS
PD168117
7.7 Selecting 2-phase Excitation/Micro Step Drive Mode The 2-phase excitation, 1-2 phase excitation, or micro step drive mode can be selected by using the MODE1 to MODE4 pins. Refer to Table 5-1. Mode Pin Truth Table for details. Immediately after release of reset, the IC is initialized. In the 1-2 phase excitation and micro step drive mode, excitation is started from the position where the output current of ch1 (ch3) is 100% and output current of ch2 (ch4) is 0%. In the 2-phase excitation drive mode, excitation is started from the position where the currents of both ch1 (ch3) and ch2 (ch4) are +100%. When the mode is changed from the micro step driving to the 2-phase excitation (or 1-2 phase excitation), the position of micro step is held until CLK is input. When the rotation direction does not change, pulse output is started by the first CLK input, the position is skipped to the 2-phase position of the next quadrant (or to the closest 1-2 phase position at the rotation direction destination), and driving is started. When the rotation direction changes, it is skipped to 2-phase position of the next quadrant, or 1-2-phase position to the direction which changed, and a drive is started. Figure 7-2. Concept of Change Operation, Micro Step Driving 2-phase Excitation (1-2 Phase Excitation)
Microstep stop position (example 1) 2-phase excitation stop position Skipes to the next quadrant
(4)
(1)
Microstep stop position (example 2)
(3)
(2)
7.8 Under-voltage Lockout (UVLO) Circuit
This function is to forcibly stop the operation of the IC to prevent malfunctioning if VDD drops. When UVLO operates, the IC is in the reset status. If VDD drops abruptly in the order of several s, this function may not operate.
7.9 Overheat Protection (TSD) Circuit
This function is to forcibly stop the operation of the IC to protect it from destruction due to overheating if the chip temperature of the IC rises. The overheat protection circuit operates when the chip temperature rises to 150C or more. When overheat is detected, all the circuits are stopped. When reset state or when UVLO is detected, the overheat protection circuit does not operate.
7.10 Power Up Sequence
This IC has a circuit that prevents current from flowing into the VM pin when VDD = 0 V. Therefore, the current that flows into the VM pin is cut off 1 A MAX. when VDD = 0 V.
Data Sheet S17310EJ2V0DS
15
PD168117
8. NOTE ON CORRECT USE
8.1 Transmitting Data
Data input at reset state is ignored.
8.2 Pin Processing of Unused Circuit
The input/output pins of an unused circuit must be processed as specified below. A VM power supply pin is provided for each output circuit. The current consumption of the internal circuit can be reduced by dropping the VM power of the unused circuit to GND. However, if there are multiple power supply pins, be sure to connect all of them to the same potential.
Lower OE1, CLK1, and CW1. Open FIL1, FIL2, OUT1A, OUT1B, OUT2A, and OUT2B. Connect FB1 and FB2 to GND. Set the general-purpose drive mode. Lower OE2/IN3A, CLK2/IN3B, CW2/IN4A. Higher MODE4/IN4B. Open FIL3, FIL4, OUT3A, OUT3B, OUT4A, and OUT4B. Connect FB3 and FB4 to GND. Lower IN5A (IN6A) and IN5B (IN6B) . Open OUT5A (OUT6A) and OUT5B (OUT6B) . Lower SEL7, SELVREF7, IN7A, and IN7B. Open OUT7A and OUT7B. Connect VREF7, FIL7, FB7, and R7 to GND.
8.3 Input Pin Processing
The signal input pins for this IC are not equipped with on-chip pull down/pull up resistors. When the VDD power is on, the logic for all of the input pins must be set to either H or L.
16
Data Sheet S17310EJ2V0DS
PD168117
9. STEPPING MOTOR DRIVING WAVEFORM
Figure 9-1. 2-phase Excitation Output Mode
Figure 9-2. 1-2 Phase Excitation Output Mode
Phase A current
100%
Phase A current
100%
70% of a current setting 70% of a current setting
-100% 0 1 2 3 4 5 6 7 8
-100% 0 1 2 3 4 5 6 7 8
Phase B current
100%
Phase B current
100%
70% of a current setting 70% of a current setting
-100% 0 1 2 3 4 5 6 7 8
-100% 0 1 2 3 4 5 6 7 8
Remark Solid line: Output duty 100% drive, Dotted line: Current control drive (The current is in accordance with the current setting.)
Data Sheet S17310EJ2V0DS
17
PD168117
Figure 9-3. Micro Step Drive Mode
RESET position ch1 current
100 99.5 98.1 95.7 92.4 88.2 83.1 77.3 70.7 63.4 55.6 47.1 38.3 29.0 19.5 9.8 0 -9.8 -19.5 -29.0 -38.3 -47.1 -55.6 -63.4 -70.7 -77.3 -83.1 -88.2
-92.4 -98.1 -95.7 -100 -99.5
0
5
10 15 20 25 30 35 40
45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130
100 99.5 98.1 95.7 92.4 88.2 83.1 77.3 70.7 63.4 55.6 47.1 38.3 29.0 19.5 9.8 0 -9.8 -19.5 -29.0 -38.3 -47.1 -55.6 -63.4 -70.7 -77.3 -83.1 -88.2
ch2 current
-92.4 -98.1 -95.7 -100 -99.5
0
5
10 15 20 25 30 35 40
45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130
Remark The horizontal axis of the above charts indicates the number of steps. The above charts show an example in the CW (forward) mode. The current flowing into phases A and B is positive in the direction from OUT pin A to OUT pin B, and negative in the direction from OUT pin B to OUT pin A. Because the micro step drive mode is in actuality 128 steps, it equals 1 electrical angle cycle.
18
Data Sheet S17310EJ2V0DS
PD168117
10. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = 25C, glass epoxy board of 100 mm x 100 mm x 1 mm with copper foil area of 15%)
Parameter Power supply voltage Symbol VDD VM Input voltage Output pin voltage DC output current (ch1 to 6ch) DC output current (ch7) Instantaneous output current VIN VOUT ID(DC) ID(DC) ID(pulse) Motor block DC (during output independent operation) DC (during output independent operation) PW < 10 ms, Duty Cycle 20% (during output independent operation) Power consumption Peak junction temperature Storage temperature PT Tch(MAX) Tstg 1.0 150 -55 to +150 W C C Control block Motor block Condition Rating -0.5 to +6.0 -0.5 to +6.0 -0.5 to VDD +0.5 6.2 0.4 0.5 0.7 Unit V V V V A/ch A/ch A/ch
Remark The overheat protection circuit operates at Tch > 150C. When overheat is detected, all the circuits are stopped. The overheat protection circuit does not operate at reset or on detection of ULVO.
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded.
Recommended Operating Conditions (TA = 25C, glass epoxy board of 100 mm x 100 mm x 1 mm with copper foil area of 15%)
Parameter Power supply voltage Symbol VDD VM Input voltage DC output current (ch1 to 6ch) DC output current (ch7) Instantaneous output current VIN ID(DC) ID(DC) ID(pulse) DC (during output independent operation) DC (during output independent operation) PW < 10 ms, Duty Cycle 20% (during output independent operation) Capacitor capacitance ch7 reference voltage input range Logic input frequency Operating temperature range fIN TA -10 150 75 kHz C VREF7 COSC (during 300 kHz TYP. oscillation) 0.1 100 0.7 pF V Control block Motor block Condition MIN. 2.7 2.7 0 -0.3 -0.4 -0.6 TYP. MAX. 3.6 5.5 VDD +0.3 +0.4 +0.6 Unit V V V A/ch A/ch A/ch
Data Sheet S17310EJ2V0DS
19
PD168117
Figure 10-1. AC timing waveform
6.7 s MIN.
2.0 s MIN.
CLK 0.1 s MIN.
2.0 s MIN.
0.1 s MIN.
0.1 s MIN.
CW 0.1 s MIN. MODE (including reset) 0.1 s MIN. 0.1 s MIN.
Electrical Characteristics (Unless otherwise specified, TA = 25C, VDD = 3.0 V, VM = 3.0 V)
Parameter VDD pin current in standby mode VDD pin current in during operation High-level input current Low-level input current High-level input voltage Low-level input voltage COSC oscillation frequency H-bridge on-state resistance Symbol IDD(STB) IDD(ACT) IIH IIL VIH VIL fOSC Ron COSC = 150 pF IM = 0.3 A, sum of upper and lower stages (ch1 to ch4, and ch7) Ron56 IM = 0.3 A, sum of upper and lower stages (ch5 and ch6) Output leakage current
Note1
Condition During reset During non-reset VIN = VDD VIN = 0 V
MIN.
TYP.
MAX. 1.0 5.0 1.0
Unit
A
mA
A A
V
-1.0 0.7 x VDD 0.3 x VDD 100 1.0 1.5
V kHz
1.5
2.0
IM(off) VDDS VREF VREF7
Per VM pin, All control pin: low level 1.7 ch1 to ch4 ch7, during SELVREF7 = H IM = 0.1 A, with sense resistor of 5 k, ch1 to ch4 450 180 950 500 200 1050
1.0 2.5 550 220 1150
A
V mV mV
Low-voltage detection voltage Internal reference voltage
Note2
Current detection ratio
Note2
Output turn-on time Output turn-off time
ton toff
RL = 20 , ch1 to ch6
0.02 0.02
0.35 0.35
1.0 1.0
s s
Notes 1. This IC has a circuit that prevents current from flowing into the VM pin when VDD = 0 V. 2. The accuracy of the output current for ch1 to ch4 depends upon the motor that is actually used, but the current fluctuations of the IC are determined by reference voltage and current detection ratios. Assume that the total of the reference voltage VREF and current sense circuit errors are equal to 10%.
20
Data Sheet S17310EJ2V0DS
PD168117
11. PACKAGE DRAWING
56-PIN PLASTIC WQFN (8x8)
HD D D /2
42 43
HD /2
29 28
4-C0.5 A2
E /2 HE E HE /2
56 1 15 14
A1 DETAIL OF P PART
C
x4 ZE ZD y1 S A S y f SAB b1 b S B
P
c1 c2
(UNIT:mm) ITEM D E f HD HE t DIMENSIONS 7.75 7.75 0.20 8.00 8.00 0.20 0.67 +0.08 -0.04 0.03 +0.02 -0.025 0.64 0.230.05 0.200.03 0.17 0.14-0.16 0.14-0.20 0.50 0.400.10 0.05 0.08 0.10 0.625 0.625 P56K9-50-9B4
TERMINAL SECTION t SAB
x4
A
A A1 A2 b b1 c c1
0.08MIN. 0.08MIN. b x
M
c2
e
Lp SAB
e Lp x y y1 ZD ZE
NOTES 1 "t" AND "f" EXCLUDES MOLD FLASH 2 ALTHOUGH THERE ARE 4 TERMINALS IN THE CORNER PART OF A PACKAGE, THESE TERMINALS ARE NOT DESIGNED FOR INTERCONNECTION, BUT FOR MANUFACTURING PROCESS OF THE PACKAGE, THEREFOR DO NOT INTEND TO SOLDER THESE 4 TERMINALS, SOLDERABLITY OF THE 4 TERMINALS ARE NOT GUARANTEED.
Data Sheet S17310EJ2V0DS
21
PD168117
12. RECOMMENDED SOLDERING CONDITIONS
The PD168117 should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website.
Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)
Type of Surface Mount Device
PD168117K9-9B4-A
Process Infrared reflow
Note1
: 56-pin plastic WQFN (8 x 8)
Conditions Symbol IR60-103-3
Package peak temperature: 260C, Time: 60 seconds MAX. (at 220C or higher) , Count: Three times or less, Exposure limit: 3 days
Note2
(after that, prebake at 125C
for 10 hours) , Flux: Rosin flux with low chlorine (0.2 Wt% or below) recommended. Products other than in heat-resistant trays (such as those packaged in a magazine, taping, or non-thermal-resistant tray) cannot be baked in their package.
Notes 1. Pb-free (This product does not contain Pb in external electrode and other parts.) 2. After opening the dry pack, store it a 25C or less and 65% RH or less for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating) .
22
Data Sheet S17310EJ2V0DS
PD168117
NOTES FOR CMOS DEVICES
1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. 3 PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. 4 STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. 5 POWER ON/OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. 6 INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device.
Data Sheet S17310EJ2V0DS
23
PD168117
Reference Documents NEC Semiconductor Device Reliability/Quality Control System (C10983E) Quality Grades On NEC Semiconductor Devices (C11531E)
* The information in this document is current as of December, 2004. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. * NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. * NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application. (Note) (1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. (2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above).
M8E 02. 11-1

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